JPH0277150A - クロックライン駆動装置 - Google Patents

クロックライン駆動装置

Info

Publication number
JPH0277150A
JPH0277150A JP22940388A JP22940388A JPH0277150A JP H0277150 A JPH0277150 A JP H0277150A JP 22940388 A JP22940388 A JP 22940388A JP 22940388 A JP22940388 A JP 22940388A JP H0277150 A JPH0277150 A JP H0277150A
Authority
JP
Japan
Prior art keywords
chip
clock line
main
main buffers
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22940388A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0550143B2 (en]
Inventor
Hideji Koike
秀治 小池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP22940388A priority Critical patent/JPH0277150A/ja
Publication of JPH0277150A publication Critical patent/JPH0277150A/ja
Publication of JPH0550143B2 publication Critical patent/JPH0550143B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP22940388A 1988-09-13 1988-09-13 クロックライン駆動装置 Granted JPH0277150A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22940388A JPH0277150A (ja) 1988-09-13 1988-09-13 クロックライン駆動装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22940388A JPH0277150A (ja) 1988-09-13 1988-09-13 クロックライン駆動装置

Publications (2)

Publication Number Publication Date
JPH0277150A true JPH0277150A (ja) 1990-03-16
JPH0550143B2 JPH0550143B2 (en]) 1993-07-28

Family

ID=16891663

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22940388A Granted JPH0277150A (ja) 1988-09-13 1988-09-13 クロックライン駆動装置

Country Status (1)

Country Link
JP (1) JPH0277150A (en])

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5532500A (en) * 1993-09-01 1996-07-02 Nec Corporation Semiconductor integrated circuit device having clock signal wiring construction for suppressing clock skew
US6724679B2 (en) 2001-10-26 2004-04-20 Renesas Technology Corp. Semiconductor memory device allowing high density structure or high performance
KR100429891B1 (ko) * 2002-07-29 2004-05-03 삼성전자주식회사 클럭 스큐를 최소화하기 위한 격자형 클럭 분배망
KR100609342B1 (ko) * 1998-11-10 2006-08-09 가부시키가이샤 히타치세이사쿠쇼 반도체 장치

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5532500A (en) * 1993-09-01 1996-07-02 Nec Corporation Semiconductor integrated circuit device having clock signal wiring construction for suppressing clock skew
KR100609342B1 (ko) * 1998-11-10 2006-08-09 가부시키가이샤 히타치세이사쿠쇼 반도체 장치
US6724679B2 (en) 2001-10-26 2004-04-20 Renesas Technology Corp. Semiconductor memory device allowing high density structure or high performance
KR100429891B1 (ko) * 2002-07-29 2004-05-03 삼성전자주식회사 클럭 스큐를 최소화하기 위한 격자형 클럭 분배망

Also Published As

Publication number Publication date
JPH0550143B2 (en]) 1993-07-28

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